1. Field of the Invention
The present invention relates generally to an error correction decoder. More particularly, the present invention relates to an error correction decoder for correcting errors in digital data read from a recording medium, and an address generation circuit suitable for use with the decoder.
2. Description of the Related Art
In a CD-ROM system, a CD (Compact Disk) is used as a read only memory (ROM) for storing digital audio data. In order to enhance the reliability of the data read from the CD, the CD-ROM system performs double error correction on the read data. The first error correction is executed in a digital signal processor which is shared by an audio system, while the second error correction is performed by a CD-ROM decoder for the CD-ROM system.
FIG. 1 is a schematic block diagram of a CD-ROM system. FIG. 2 shows the format of data recorded on a CD. The data includes user data and parity code data which are used to detect and correct errors in the user data. The user data and parity code data are alternately arranged. For example, plural pieces of parity code data are assigned to a user data group arranged for each of a predetermined number of lines in the units of a given number of words. One user data group and plural pieces of parity data form a single block.
As shown in FIG. 1, the CD-ROM system includes a pickup section 1, a pickup controller 2, an analog signal processor 3, a digital signal processor 4, a CD-ROM decoder 5, a buffer RAM 6 and a control microcomputer 7. The pickup section 1 receives reflected light of light irradiated on a disk, and generates a voltage signal corresponding to the intensity of the reflected light.
The pickup controller 2 controls a reading position of the pickup section 1 on the disk so that the pickup section 1 can read data stored on the disk in the proper order. The disk is rotated at a predetermined speed with servo control to maintain the linear velocity of the tracks on the disk constant.
The analog signal processor 3 receives the voltage signal from the pickup section 1 and performs waveform shaping of the voltage signal to produce an EFM (Eight to Fourteen Modulation) signal. The analog signal processor 3 includes a phase-locked loop which generates a reference signal for controlling the rotation of the disk using the EFM signal.
The digital signal processor 4 receives the EFM signal from the analog signal processor 3 and performs EFM demodulation and CIRC (Cross-Interleave Reed-Solomon Code) decoding on the EFM signal to produce CD-ROM data. In the EFM demodulation, data consisting of 14 bits per word is converted to data consisting of 8 bits per word because when data is recorded on a disk, 8-bit data is converted (EFM demodulated) to 14-bit data according to predetermined rules. In the CIRC decoding, demodulated data is subjected to error correction in accordance with a Reed-Solomon code. The CIRC decoding completes the first error correction.
The CD-ROM decoder 5 receives the CD-ROM data from the digital signal processor 4, executes the second error correction on the CD-ROM data and supplies the corrected CD-ROM data to a host computer. In the second correction process by the CD-ROM decoder 5, error correction and error detection are carried out according to an ECC (Error Correcting Code) and EDC (Error Detecting Code) which are included in a parity code. Normally, the ECC and EDC are affixed to one block of CD-ROM data. The CD-ROM decoder 5 is designed to temporarily store CD-ROM data in the buffer RAM 6 until one block of CD-ROM data is acquired from the digital signal processor 4. The buffer RAM 6 temporarily stores CD-ROM data block by block.
Some CD-ROM decoders are capable of carrying out reception of CD-ROM data from the digital signal processor 4, correction of the CD-ROM data and supply of the CD-ROM data to the host computer in parallel. With such a CD-ROM decoder 5, it is preferable that the buffer RAM 6 store at least three blocks of CD-ROM data. While error correction of the first block of CD-ROM data is performed, the buffer RAM 6 can store not only the first block of CD-ROM data but also the second block of CD-ROM data to be subjected to the next error correction and the third CD-ROM data which has been error-corrected and is ready to be transferred to the host computer.
The control microcomputer 7 has a so-called one-chip structure with a ROM and RAM incorporated, and controls the CD-ROM decoder 5 and the other individual sections in accordance with a control program stored in the ROM. The control microcomputer 7 receives command data from the host computer or subcode data from the digital signal processor 4, and temporarily stores such data in its RAM. Accordingly, the control microcomputer 7 controls the individual sections in accordance with a command or instruction from the host computer in such a way that the CD-ROM decoder 5 sends the desired CD-ROM data to the host computer.
The CD-ROM decoder 5, which performs error correction, reception and outputting of CD-ROM data, includes an address generation circuit for generating an address to access the buffer RAM 6. At the time of receiving CD-ROM data, the CD-ROM decoder 5 accesses the buffer RAM 6 in accordance with the input order of the CD-ROM data. At the time of sending CD-ROM data, the CD-ROM decoder 5 responds to an instruction from the host computer. In error correction, the CD-ROM decoder 5 accesses the buffer RAM 6 in such a manner that user data is distinguished from parity bits.
To execute individual processes in parallel, the CD-ROM decoder 5 controls the timing for the individual processes and the address generation circuit generates addresses for different blocks to access the buffer RAM 6 in a time-division manner. This complicates the address generation circuit's generation of a write address signal for writing data in the buffer RAM 6 and a read address signal for reading data from the buffer RAM 6. The complex generation of address signals enlarges the circuit area of the address generation circuit and makes fast access difficult.
Such a problem is inherent to a DVD-ROM system which uses a DVD (Digital Video Disk), a high-density recording medium, as a ROM as well as the CD-ROM system. A DVD has about seven times the recording capacity of a CD. Fast operation of the decoder is required to make the playback speed for the DVD faster than that of the CD.